1. Field of the Invention
The present invention relates generally to wiring and a method for forming same. Particularly, the present invention relates to minute contact structures in semiconductor wiring which can resist electromigration as well as stress migration and the like.
2. Description of the Prior Art
Formation of circuit structures of aluminum, or aluminum based alloys on a semiconductor substrate is well known in the art. In semiconductor design, size reduction is increasingly desirable. For forming upper and lower strata of wiring, for example, or for realizing electrical resistance of wiring formed on a substrate, contact holes with very small aspect ratios have been developed. With such contact holes, which may have a circumference of 0.5 .mu.m or less, shorting, or disconnection occurrence may result due to stress migration or alternatively, because of electromigration.
Two principle causes of stress migration are
(1) compression stress maintained in a passivation layer of a semiconductor gives rise to variation in flexure and to expansion dependent on a return or `snapback` force of an interior area of an aluminum (Al) (aluminum) wiring portion; PA1 (2) in minute wiring structures, voids become enlarged due to a heat expansion coefficient value in wiring and passivation layers dependent on aluminum contraction.
Referring to FIG. 9, a cross-sectional view of a conventional semiconductor contact hole arrangement is shown. According to this construction, a silicon substrate 1 has a silicon oxide (SiO.sub.2) insulating layer formed thereon wherein a contact hole 2a is defined with the silicon substrate 1 forming the bottom thereof. Subsequently, layered successively over the silicon substrate 1 and the SiO.sub.2 insulating layer 2, a titanium (Ti) layer 3 and a titanium nitride (TiN) layer 4 are formed which also define the contact hole 2a. Thereover, an aluminum (Al) layer 5 Is formed so as to fill the contact hole 2a and over the aluminum layer 5 a SiN layer formed by plasma CVD method is deposited. Flexible variation, that is, expansion and contraction of the aluminum layer (wavy lines in FIG. 9) and, in the interior portion of the contact hole, pullback stress (arrow direction in FIG. 9) causes occurrence of disconnection, or short circuiting in conventional semiconductor structures.
On the other hand, electromigration, is based on a so-called `electron wind` phenomenon, i.e. where aluminum atoms are transported by electron flow. Referring to FIG. 10, a cross-sectional view of a semiconductor arrangement having an aluminum layer 5 is shown in a condition wherein, at the contact hole, the silicon substrate forms a negative pole while the aluminum layer 5 forms a positive pole such that a void is formed. This portion has no aluminum (Al) supply source at the negative pole side. In the drawing, the arrow indicates the direction of current flow and numeral 1a indicates an impurity diffusion region.
In very minute circuitry, such as LSI devices, when reduced circumferences are employed for contact holes, such migration related disconnection problems become more pronounced.